The latest development version of this page may be more current than this released 0.4.2 version.

PINMUX

The reuse relationship of pinmux function in W801S chip

GPIO_NUM

PadName

OPT1

OPT2

OPT3

OPT4

OPT5

OPT6

OPT7

WM_GPIO_NUM_0

PA0

I2S_MCLK0 (output only)

L-SPI_CS_1

PWM2

I2S_DO_1

GPIO

Bootmode

WM_GPIO_NUM_1

PA1

JTAG_CK

I2C_SCL_1

PWM3

I2S_LRCLK_1

GPIO

SD_ADC_1

WM_GPIO_NUM_2

PA2

UART1_RTS_0

UART2_TX_1/SIM_DATA_1

PWM0

UART3_RTS_0

GPIO

SD_ADC_4

WM_GPIO_NUM_3

PA3

UART1_CTS_0

UART2_RX_1

PWM1

UART3_CTS_0

GPIO

SD_ADC_3

WM_GPIO_NUM_4

PA4

JTAG_SWO

I2C_SDA_1

PWM4

I2S_BCLK_1

GPIO

SD_ADC_2

WM_GPIO_NUM_5

PA5

UART3_TX_1

UART2_RTS_1/SIM_CLK_1

PWM_BREAK

UART4_RTS_0

GPIO

WM_GPIO_NUM_6

PA6

UART3_RX_1

UART2_CTS_1

UART4_CTS_0

GPIO

LCD_SEG31

WM_GPIO_NUM_7

PA7

PWM4

L-SPI_MOSI_1

I2S_MCLK1

I2S_DI_1

GPIO

LCD_SEG03

WM_GPIO_NUM_8

PA8

PWM_BREAK

UART4_TX_1

UART5_TX_2

I2S_BCLK_3

GPIO

LCD_SEG04

WM_GPIO_NUM_9

PA9

MMC_CLK_1

UART4_RX_1

UART5_RX_2

I2S_LRCLK_3

GPIO

LCD_SEG05

Touch1

WM_GPIO_NUM_10

PA10

MMC_CMD_1

UART4_RTS_1

PWM0

I2S_DO_3

GPIO

LCD_SEG06

Touch2

WM_GPIO_NUM_11

PA11

MMC_DAT0_1

UART4_CTS_1

PWM1

I2S_DI_3

GPIO

LCD_SEG07

WM_GPIO_NUM_12

PA12

MMC_DAT1_1

UART5_TX_1

PWM2

GPIO

LCD_SEG08

CMOD

WM_GPIO_NUM_13

PA13

MMC_DAT2_1

UART5_RX_1

PWM3

GPIO

LCD_SEG09

WM_GPIO_NUM_14

PA14

MMC_DAT3_1

UART5_CTS_1

PWM4

GPIO

LCD_SEG10

CDC

WM_GPIO_NUM_15

PA15

PSRAM_CK_1

UART5_RTS_1

PWM_BREAK

GPIO

LCD_SEG11

WM_GPIO_NUM_16

PB0

PWM0

L-SPI_MISO_1

UART3_TX_0

PSRAM_CK_0

GPIO

LCD_SEG12

Touch3

WM_GPIO_NUM_17

PB1

PWM1

L-SPI_CK_1

UART3_RX_0

PSRAM_CS_0

GPIO

LCD_SEG13

Touch4

WM_GPIO_NUM_18

PB2

PWM2

L-SPI_CK_0

UART2_TX_0/SIM_DATA_0

PSRAM_DAT0_0

GPIO

LCD_SEG14

Touch5

WM_GPIO_NUM_19

PB3

PWM3

L-SPI_MISO_0

UART2_RX_0

PSRAM_DAT1_0

GPIO

LCD_SEG15

Touch6

WM_GPIO_NUM_20

PB4

L-SPI_CS_0

UART2_RTS_0/SIM_CLK_0

UART4_TX_0

PSRAM_DAT2_0

GPIO

LCD_SEG16

Touch7

WM_GPIO_NUM_21

PB5

L-SPI_MOSI_0

UART2_CTS_0

UART4_RX_0

PSRAM_DAT3_0

GPIO

LCD_SEG17

Touch8

WM_GPIO_NUM_22

PB6

UART1_TX_0

MMC_CLK_0

H-SPI_CK_0

SDIO_SLAVE_CK

GPIO

LCD_SEG18

Touch9

WM_GPIO_NUM_23

PB7

UART1_RX_0

MMC_CMD_0

H-SPI_INT_0

SDIO_SLAVE_CMD

GPIO

LCD_SEG19

Touch10

WM_GPIO_NUM_24

PB8

I2S_BCLK_0

MMC_DAT0_0

PWM_BREAK_0

SDIO_SLAVE_D0

GPIO

LCD_SEG20

Touch11

WM_GPIO_NUM_25

PB9

I2S_LRCLK_0

MMC_DAT1_0

H-SPI_CS_0

SDIO_SLAVE_D1

GPIO

LCD_SEG21

Touch12

WM_GPIO_NUM_26

PB10

I2S_DI_0

MMC_DAT2_0

H-SPI_DI_0

SDIO_SLAVE_D2

GPIO

LCD_SEG22

WM_GPIO_NUM_27

PB11

I2S_D0_0

MMC_DAT3_0

H-SPI_DO_0

SDIO_SLAVE_D3

GPIO

LCD_SEG23

WM_GPIO_NUM_28

PB12

H-SPI_CK_1

PWM0

UART5_CTS_0

I2S_BCLK_2

GPIO

LCD_SEG24

WM_GPIO_NUM_29

PB13

H-SPI_INT_1

PWM1

UART5_RTS_0

I2S_LRCLK_2

GPIO

LCD_SEG25

WM_GPIO_NUM_30

PB14

HSPI_CS_1

PWM2

L-SPI_CS_3

I2S_DO_2

GPIO

LCD_SEG26

WM_GPIO_NUM_31

PB15

HSPI_DI_1

PWM3

L-SPI_CK_3

I2S_DI_2

GPIO

LCD_SEG27

WM_GPIO_NUM_32

PB16

HSPI_DO_1

PWM4

L-SPI_MISO_3

UART1_RX_1

GPIO

LCD_SEG28

WM_GPIO_NUM_33

PB17

UART5_RX_0

PWM_BREAK

L-SPI_MOSI_3

I2S_MCLK2

GPIO

LCD_SEG29

WM_GPIO_NUM_34

PB18

UART5_TX_0

GPIO

LCD_SEG30

WM_GPIO_NUM_35

PB19

UART0_TX_0

PWM0

UART1_RTS_1

I2C_SDA_0

GPIO

WM_GPIO_NUM_36

PB20

UART0_RX_0

PWM1

UART1_CTS_1

I2C_SCL_0

GPIO

WM_GPIO_NUM_37

PB21

UART0_RTS_0

GPIO

LCD_COM01

WM_GPIO_NUM_38

PB22

UART0_CTS_0

GPIO

LCD_COM02

WM_GPIO_NUM_39

PB23

L-SPI_CS_2

GPIO

LCD_SEG00

WM_GPIO_NUM_40

PB24

L-SPI_CK_2

PWM2

GPIO

LCD_SEG02

WM_GPIO_NUM_41

PB25

L-SPI_MISO_2

PWM3

GPIO

LCD_COM00

WM_GPIO_NUM_42

PB26

L-SPI_MOSI_2

PWM4

GPIO

LCD_SEG01

WM_GPIO_NUM_43

PB27

PSRAM_CS_1

UART0_TX_1

GPIO

LCD_COM03

WM_GPIO_NUM_44

PB28

PSRAM_DAT0_1

UART0_RX_1

GPIO

LCD_COM04

WM_GPIO_NUM_45

PB29

PSRAM_DAT1_1

UART0_RTS_1

GPIO

LCD_COM05

Touch13

WM_GPIO_NUM_46

PB30

PSRAM_DAT2_1

UART0_CTS_1

GPIO

LCD_COM06

WM_GPIO_NUM_47

PB31

PSRAM_DAT3_1

UART1_TX_1

GPIO

LCD_COM07

Requirements for setting pin attributes for each function

IO Function

Sub-Function Requirements

Pullmode

Direction

LCD_SEG

FLOAT

INPUT

LCD_COM

FLOAT

INPUT

SD_ADC

FLOAT

INPUT

Touch

FLOAT

INPUT

I2C_SDA

PULLUP

Irrelevant

I2C_SCL

PULLUP

Irrelevant

PWM_BREAK

High level Trigger

PULLDOWN

Irrelevant

PWM_BREAK

Low level Trigger

PULLUP

Irrelevant

I2S_MCLK

Ext Clock

Irrelevant

INPUT?

I2S_MCLK

Internal Clock

Irrelevant

Irrelevant

I2S_LRCLK

L->R

PULLUP

Irrelevant

I2S_LRCLK

R->L

PULLDOWN

Irrelevant

UART RX

PULLUP

Irrelevant

GPIO

Input

PULLUP/DOWN/FLOAT

INPUT

GPIO

Output

Irrelevant

OUTPUT

SDIO

Irrelevant

Irrelevant

HSPI

Irrelevant

Irrelevant

SIM

Irrelevant

Irrelevant

PWM

Irrelevant

Irrelevant

MMC

Irrelevant

Irrelevant

Uart TX/RTS/CTS

Irrelevant

Irrelevant

JTAG

Irrelevant

Irrelevant

I2S BCLK/DI/DO

Irrelevant

Irrelevant

Note

After the W800 is powered on, all IO defaults to Floating and Input status

IO configured as OPT6, 7 o’clock is configured as analog function, do not set pullup at this time, otherwise it may damage the chip

The application layer needs to pay attention to IO configuration, with only one pin func configuration per channel, and maintain only one output channel

When multiple pins are set to the same PWM channel (e.g. GPO2, GPO10 are both set to PWM0), these pins will output